Transient Microarchitectural Attacks
Security-observable behavior in processors and GPUs, including timing, scheduling, and memory effects.
Postdoctoral Researcher at KTH Royal Institute of TechnologyAssistant Professor at Amirkabir University of Technology
I am an Assistant Professor at Amirkabir University of Technology (AUT) and recently joined the NSE Division at KTH Royal Institute of Technology as a Postdoctoral Researcher funded by WASP.
I received my Ph.D. in Digital Electronic Systems from the University of Tehran . Since then, my research has focused on different aspects of hardware security and trust, particularly Hardware Trojan detection, PUF-based authentication protocols, and microarchitectural attacks and defenses.
My current research explores microarchitectural vulnerabilities in modern heterogeneous computing platforms, with a particular focus on GPU side-channel attacks and defenses.
I have taught several university-level courses in digital design, computer architecture, digital forensics, and cyber-physical systems. I also have several years of industrial experience in digital ASIC design, including both front-end and back-end stages of integrated circuit design, the automotive industry, and hardware/software implementation for FPGAs and embedded systems.
Security-observable behavior in processors and GPUs, including timing, scheduling, and memory effects.
Detection and countermeasure methods for malicious modifications in integrated circuits.
Lightweight protocols and hardware primitives for secure identification.
Design-time analysis and modification flows for trust verification.
Efficient digital design and low-power architectures for embedded systems.
Education, experience, awards, and technical skills.
Courses taught at AUT, KTH, and University of Tehran.
Selected papers and research themes.
Research prototypes, source-code material, and engineering projects.
KTH Royal Institute of Technology, Stockholm, Sweden.